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authorVladimir Serbinenko <phcoder@gmail.com>2013-12-20 17:47:19 +0100
committerVladimir Serbinenko <phcoder@gmail.com>2013-12-24 14:40:49 +0100
commitb32816e9a5564e3604c3829b92727b54356f4777 (patch)
treee903e61e25651a410426a08df203d193d99f6166 /src/southbridge/nvidia
parent50ecb9c11131a31bc6f0d0e0b5fcbd5aab36e5e0 (diff)
Remove PCI_ROM_RUN option
The main purpose of option rom is to supply int* handlers. But supplying those is outside of coreboot scope and if someone needs those they should run SeaBIOS anyway which runs the option roms wonderfully. Running VGA oprom is kept because they're needed to init graphics. This patch still keeps the options to include the option roms to make them available to SeaBIOS. Change-Id: I646334cf88094d3bf8f527779a68a07e0b4b93ec Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/4545 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Kevin O'Connor <kevin@koconnor.net>
Diffstat (limited to 'src/southbridge/nvidia')
-rw-r--r--src/southbridge/nvidia/ck804/ide.c4
-rw-r--r--src/southbridge/nvidia/ck804/nic.c4
-rw-r--r--src/southbridge/nvidia/mcp55/ide.c3
-rw-r--r--src/southbridge/nvidia/mcp55/nic.c5
4 files changed, 0 insertions, 16 deletions
diff --git a/src/southbridge/nvidia/ck804/ide.c b/src/southbridge/nvidia/ck804/ide.c
index 1750a2aff5..5b0ba51312 100644
--- a/src/southbridge/nvidia/ck804/ide.c
+++ b/src/southbridge/nvidia/ck804/ide.c
@@ -59,10 +59,6 @@ static void ide_init(struct device *dev)
dword = pci_read_config32(dev, 0xf8);
dword |= 12;
pci_write_config32(dev, 0xf8, dword);
-
-#if CONFIG_PCI_ROM_RUN
- pci_dev_init(dev);
-#endif
}
static struct device_operations ide_ops = {
diff --git a/src/southbridge/nvidia/ck804/nic.c b/src/southbridge/nvidia/ck804/nic.c
index 3dccb8ea7d..e285644bec 100644
--- a/src/southbridge/nvidia/ck804/nic.c
+++ b/src/southbridge/nvidia/ck804/nic.c
@@ -107,10 +107,6 @@ static void nic_init(struct device *dev)
#endif
nic_index++;
-
-#if CONFIG_PCI_ROM_RUN
- pci_dev_init(dev); /* It will init Option ROM. */
-#endif
}
static struct device_operations nic_ops = {
diff --git a/src/southbridge/nvidia/mcp55/ide.c b/src/southbridge/nvidia/mcp55/ide.c
index 23d4db1c28..5f8152bbe5 100644
--- a/src/southbridge/nvidia/mcp55/ide.c
+++ b/src/southbridge/nvidia/mcp55/ide.c
@@ -61,9 +61,6 @@ static void ide_init(struct device *dev)
dword = pci_read_config32(dev, 0xf8);
dword |= 12;
pci_write_config32(dev, 0xf8, dword);
-#if CONFIG_PCI_ROM_RUN
- pci_dev_init(dev);
-#endif
}
static struct device_operations ide_ops = {
diff --git a/src/southbridge/nvidia/mcp55/nic.c b/src/southbridge/nvidia/mcp55/nic.c
index 86468fd64e..fd736e6a0c 100644
--- a/src/southbridge/nvidia/mcp55/nic.c
+++ b/src/southbridge/nvidia/mcp55/nic.c
@@ -179,11 +179,6 @@ static void nic_init(struct device *dev)
#endif
nic_index++;
-
-#if CONFIG_PCI_ROM_RUN
- pci_dev_init(dev);// it will init option rom
-#endif
-
}
static struct device_operations nic_ops = {