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authorElyes HAOUAS <ehaouas@noos.fr>2016-08-31 19:22:16 +0200
committerMartin Roth <martinroth@google.com>2016-08-31 20:22:46 +0200
commitba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch)
tree9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/nvidia/mcp55/sata.c
parent2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff)
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/16291 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/nvidia/mcp55/sata.c')
-rw-r--r--src/southbridge/nvidia/mcp55/sata.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/nvidia/mcp55/sata.c b/src/southbridge/nvidia/mcp55/sata.c
index fa761d2ffd..4c2830e9be 100644
--- a/src/southbridge/nvidia/mcp55/sata.c
+++ b/src/southbridge/nvidia/mcp55/sata.c
@@ -35,7 +35,7 @@ static void sata_init(struct device *dev)
dword = pci_read_config32(dev, 0x50);
/* Ensure prefetch is disabled */
dword &= ~((1 << 15) | (1 << 13));
- if(conf) {
+ if (conf) {
if (conf->sata1_enable) {
/* Enable secondary SATA interface */
dword |= (1<<0);