diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-19 17:28:05 +0100 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-11-20 19:06:04 +0000 |
commit | 185691eedb37ae26f7829d762cd476395be57f5d (patch) | |
tree | c13705dc09e24a407d5fa2af6f8bf2e6493582f7 /src/southbridge/nvidia/ck804/pcie.c | |
parent | 87bc7554478bc7a723baef0aedf5ad42e7747499 (diff) |
sb/nvidia/ck804: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are
now mandatory features, which platforms using this code lack.
Change-Id: I56cb6d0a04056b10af1e53afb697883329235c87
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36972
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia/ck804/pcie.c')
-rw-r--r-- | src/southbridge/nvidia/ck804/pcie.c | 46 |
1 files changed, 0 insertions, 46 deletions
diff --git a/src/southbridge/nvidia/ck804/pcie.c b/src/southbridge/nvidia/ck804/pcie.c deleted file mode 100644 index 7bd8324d8c..0000000000 --- a/src/southbridge/nvidia/ck804/pcie.c +++ /dev/null @@ -1,46 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2004 Tyan Computer - * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include "chip.h" - -static void pcie_init(struct device *dev) -{ - u32 dword; - - /* Enable PCI error detecting. */ - dword = pci_read_config32(dev, 0x04); - dword |= (1 << 8); /* System error enable */ - dword |= (1 << 30); /* Clear possible errors */ - pci_write_config32(dev, 0x04, dword); -} - -static struct device_operations pcie_ops = { - .read_resources = pci_bus_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_bus_enable_resources, - .init = pcie_init, - .scan_bus = pci_scan_bridge, -}; - -static const struct pci_driver pcie_driver __pci_driver = { - .ops = &pcie_ops, - .vendor = PCI_VENDOR_ID_NVIDIA, - .device = PCI_DEVICE_ID_NVIDIA_CK804_PCI_E, -}; |