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authorArthur Heymans <arthur@aheymans.xyz>2019-11-19 17:28:05 +0100
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-11-20 19:06:04 +0000
commit185691eedb37ae26f7829d762cd476395be57f5d (patch)
treec13705dc09e24a407d5fa2af6f8bf2e6493582f7 /src/southbridge/nvidia/ck804/ide.c
parent87bc7554478bc7a723baef0aedf5ad42e7747499 (diff)
sb/nvidia/ck804: Drop support
Relocatable ramstage, postcar stage and C_ENVIRONMENT_BOOTBLOCK are now mandatory features, which platforms using this code lack. Change-Id: I56cb6d0a04056b10af1e53afb697883329235c87 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36972 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/nvidia/ck804/ide.c')
-rw-r--r--src/southbridge/nvidia/ck804/ide.c73
1 files changed, 0 insertions, 73 deletions
diff --git a/src/southbridge/nvidia/ck804/ide.c b/src/southbridge/nvidia/ck804/ide.c
deleted file mode 100644
index a4b5475ca0..0000000000
--- a/src/southbridge/nvidia/ck804/ide.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2004 Tyan Computer
- * Written by Yinghai Lu <yhlu@tyan.com> for Tyan Computer.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-#include <device/pci_ops.h>
-#include "chip.h"
-
-static void ide_init(struct device *dev)
-{
- struct southbridge_nvidia_ck804_config *conf;
- u32 dword;
- u16 word;
- u8 byte;
-
- conf = dev->chip_info;
-
- word = pci_read_config16(dev, 0x50);
- /* Ensure prefetch is disabled. */
- word &= ~((1 << 15) | (1 << 13));
- if (conf->ide1_enable) {
- /* Enable secondary IDE interface. */
- word |= (1 << 0);
- printk(BIOS_DEBUG, "IDE1\t");
- }
- if (conf->ide0_enable) {
- /* Enable primary IDE interface. */
- word |= (1 << 1);
- printk(BIOS_DEBUG, "IDE0\n");
- }
-
- word |= (1 << 12);
- word |= (1 << 14);
-
- pci_write_config16(dev, 0x50, word);
-
- byte = 0x20; /* Latency: 64 --> 32 */
- pci_write_config8(dev, 0xd, byte);
-
- dword = pci_read_config32(dev, 0xf8);
- dword |= 12;
- pci_write_config32(dev, 0xf8, dword);
-}
-
-static struct device_operations ide_ops = {
- .read_resources = pci_dev_read_resources,
- .set_resources = pci_dev_set_resources,
- .enable_resources = pci_dev_enable_resources,
- .init = ide_init,
- .scan_bus = 0,
- .ops_pci = &ck804_pci_ops,
-};
-
-static const struct pci_driver ide_driver __pci_driver = {
- .ops = &ide_ops,
- .vendor = PCI_VENDOR_ID_NVIDIA,
- .device = PCI_DEVICE_ID_NVIDIA_CK804_IDE,
-};