diff options
author | Jamie Chen <jamie.chen@intel.com> | 2020-01-20 18:06:19 +0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-01-21 13:10:47 +0000 |
commit | 951a6207f32fbfc7bf21f122b3a66b88fb79892c (patch) | |
tree | 05064b016dd73458f751aae157fde9eb986f37cf /src/southbridge/intel | |
parent | a5ce45b95482f6e6aacab225197cc84cbdb519bf (diff) |
mb/google/puff: Add ac/dc loadline configuations
According to VRTT report, add ac/dc loadline configuations in puff device
tree.
BUG=b:147206535
BRANCH=None
TEST=build coreboot and fsp with enabled fw_debug.
Flashed to puff and checked the log.
All ac/dc loadline configs were set correctly.
Change-Id: Ia806de23a1fefcaac3ce9a462a8a04eee5eabcae
Signed-off-by: Jamie Chen <jamie.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38479
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions