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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-02-14 15:06:50 +0200 |
|---|---|---|
| committer | Nick Vaccaro <nvaccaro@google.com> | 2021-08-19 18:14:59 +0000 |
| commit | 6fcee7533c1a4036224339ae299e448e210ca78d (patch) | |
| tree | ef3cc277bfc025e5775ebd3cab7e88d9bc02d2b7 /src/southbridge/intel | |
| parent | 891d53665b109c8bdc1b2a8f90f7a81aab024ba1 (diff) | |
soc/intel/denverton_ns: Sanity check MMCONF_BASE_ADDRESS
According to received feedback, FSP-T enables MMCONF at address
0xe0000000 with 256 busses. Sanity-check that Kconfig matches that.
Add MMCONF_BUS_NUMBER such that MCFG in ACPI will be correct.
Change-Id: I01309638a9f4ada71e5e3789db34892ed4abfa3b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50665
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/southbridge/intel')
0 files changed, 0 insertions, 0 deletions