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authorArthur Heymans <arthur@aheymans.xyz>2021-07-02 10:06:55 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-07-05 10:49:12 +0000
commit028b94b765d4d2b26627fcf7b7b4a4897e6af2cc (patch)
tree49f23d0169af3f4e6c7e271afdd1488f7e489665 /src/southbridge/intel
parent4d06ff0faaae792801c1a104e3769e69e97ef457 (diff)
sb/intel/i82801gx: Prepare for x86_64
Do the usual int conversions. TESTED: BUILD_TIMELESS=1 produces identical image on foxconn/g41m. Change-Id: Idebfe4669854b307bee653df6d93e46ae3f39dec Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56020 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801gx/azalia.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/azalia.c b/src/southbridge/intel/i82801gx/azalia.c
index 3ace204c05..fde06b4aac 100644
--- a/src/southbridge/intel/i82801gx/azalia.c
+++ b/src/southbridge/intel/i82801gx/azalia.c
@@ -8,6 +8,7 @@
#include <device/mmio.h>
#include <delay.h>
#include <device/azalia_device.h>
+#include <stdint.h>
#include "chip.h"
#include "i82801gx.h"
@@ -192,7 +193,7 @@ static void azalia_init(struct device *dev)
// NOTE this will break as soon as the Azalia get's a bar above 4G.
// Is there anything we can do about it?
base = res2mmio(res, 0, 0);
- printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)base);
+ printk(BIOS_DEBUG, "Azalia: base = %08x\n", (u32)(uintptr_t)base);
codec_mask = codec_detect(base);
if (codec_mask) {