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authorTimothy Pearson <tpearson@raptorengineeringinc.com>2015-04-05 18:03:15 -0500
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-05-03 09:14:33 +0200
commit58649b058baecf24a07a2bc85fff68b339d67503 (patch)
tree66d269b11717e74611e8ed0326d048c802d78d41 /src/southbridge/intel
parent1abd0ddfaecf4267885a12c0fb7cb3f2374ff288 (diff)
src/southbridge/intel/i82801ix: Add GPIO register locations
Change-Id: I226a1a6bc6b1f921c03f8ec57875a88314928aeb Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: http://review.coreboot.org/9318 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel')
-rw-r--r--src/southbridge/intel/i82801ix/i82801ix.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ix/i82801ix.h b/src/southbridge/intel/i82801ix/i82801ix.h
index 10b27179ca..afc644b4a7 100644
--- a/src/southbridge/intel/i82801ix/i82801ix.h
+++ b/src/southbridge/intel/i82801ix/i82801ix.h
@@ -1,6 +1,7 @@
/*
* This file is part of the coreboot project.
*
+ * Copyright (C) 2015 Timothy Pearson <tpearson@raptorengineeringinc.com>, Raptor Engineering
* Copyright (C) 2008-2009 coresystems GmbH
* 2012 secunet Security Networks AG
*
@@ -76,6 +77,15 @@
#define ALT_GP_SMI_STS 0x3a
+#define GP_IO_USE_SEL 0x00
+#define GP_IO_SEL 0x04
+#define GP_LVL 0x0c
+#define GPO_BLINK 0x18
+#define GPI_INV 0x2c
+#define GP_IO_USE_SEL2 0x30
+#define GP_IO_SEL2 0x34
+#define GP_LVL2 0x38
+
#define DEBUG_PERIODIC_SMIS 0
#define MAINBOARD_POWER_OFF 0