diff options
| author | Konstantin Aladyshev <aladyshev@nicevt.ru> | 2013-03-07 04:04:27 +0400 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-06-11 20:04:03 +0200 |
| commit | 62f8083dfdf0c5e0046efe297b2bf88474928071 (patch) | |
| tree | 68271ade40ed0a7a4a4f492bc9cf5e8f1b5ba509 /src/southbridge/intel/sch/smi.c | |
| parent | 6e5c86ff7da757687772fc9b1fc3ee41a613684c (diff) | |
Fix cycle error in intel southbridges to display GPI status
Fix obvious mistake in cycle that displays GPI status
I hope i found all duplicates of it.
Change-Id: Ic21ff3ecab85953463e5c23daf808dd5edc82ff8
Signed-off-by: Konstantin Aladyshev <aladyshev@nicevt.ru>
Reviewed-on: http://review.coreboot.org/3435
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/sch/smi.c')
| -rw-r--r-- | src/southbridge/intel/sch/smi.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/sch/smi.c b/src/southbridge/intel/sch/smi.c index 046a1dd3c7..08733a7d9a 100644 --- a/src/southbridge/intel/sch/smi.c +++ b/src/southbridge/intel/sch/smi.c @@ -168,7 +168,7 @@ static void dump_gpe0_status(u32 gpe0_sts) { int i; printk(BIOS_DEBUG, "GPE0_STS: "); - for (i=31; i<= 16; i--) { + for (i=31; i>= 16; i--) { if (gpe0_sts & (1 << i)) printk(BIOS_DEBUG, "GPIO%d ", (i-16)); } if (gpe0_sts & (1 << 14)) printk(BIOS_DEBUG, "USB4 "); |