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author | Brandon Breitenstein <brandon.breitenstein@intel.com> | 2021-03-02 14:02:26 -0800 |
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committer | Furquan Shaikh <furquan@google.com> | 2021-03-05 17:02:31 +0000 |
commit | 7b42492bedb1fc04576027f772a017148fa95b0a (patch) | |
tree | c4504f3634a611e9daf630a910b2c0386d63af96 /src/southbridge/intel/lynxpoint/pch.c | |
parent | d8774f6899ac2468c1a4e1787597ba2c22ecbae8 (diff) |
mb/google/volteer: Configure tcss port information for early tcss init
Implement the mainboard_tcss_get_port_info weak function so that the TCSS
muxes can be properly configured to ensure mapping is correct in mux. This
ensures that any devices that are connected during boot are not improperly
configured by the Kernel.
BUG=b:180426950
BRANCH=firmare-volteer-13672.B
TEST= Verified that the SOC code that initialized TCSS muxes to disconnect
mode is executing properly for all TCSS ports and verified that USB3 devices
are no longer downgrading to USB2 speed if connected during boot.
Change-Id: I59e5c5a7d2ab5ef5293abe6c59c3a585b25f7b75
Signed-off-by: Brandon Breitenstein <brandon.breitenstein@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/pch.c')
0 files changed, 0 insertions, 0 deletions