summaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/me.h
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-10 11:50:21 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2016-12-11 09:12:48 +0100
commit43e9c93eba3767f990aba518ef3e38c7a8892212 (patch)
tree0e3bcf144bb80d8fca6edf46c822b48b16797da3 /src/southbridge/intel/lynxpoint/me.h
parent803acfa064c7e58901193571a0c293a19abb60f7 (diff)
ACPI S3: Flip ACPI_HUGE_LOWMEM_BACKUP default
Except fo nehalem, K8, f10 and f15 (non-AGESA) romstage ramstack is placed in CBMEM and ramstage loader takes care of tiny backup. Change-Id: I8477944f48ed2493d0a5e436a4088eb9fc3d59c5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/17358 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/me.h')
0 files changed, 0 insertions, 0 deletions