aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/lynxpoint/lp_gpio.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-18 16:33:39 +0300
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-08-21 07:00:45 +0000
commit12b121cdb450d96309dd96b2ccc25fc5501d2250 (patch)
tree1d94c123c23512b811d69d9876ac9a860bbbe0f6 /src/southbridge/intel/lynxpoint/lp_gpio.c
parent544b572c07bb09aba36705b5d8ffca3b793323f6 (diff)
southbridge/intel: Tidy up preprocessor and headers
Change-Id: I52a7b39566acd64ac21a345046675e05649a40f5 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34980 Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/lp_gpio.c')
-rw-r--r--src/southbridge/intel/lynxpoint/lp_gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/lynxpoint/lp_gpio.c b/src/southbridge/intel/lynxpoint/lp_gpio.c
index e3d8f02805..bc8d8a1630 100644
--- a/src/southbridge/intel/lynxpoint/lp_gpio.c
+++ b/src/southbridge/intel/lynxpoint/lp_gpio.c
@@ -24,7 +24,7 @@
static u16 get_gpio_base(void)
{
-#if defined(__PRE_RAM__) || defined(__SMM__)
+#ifdef __SIMPLE_DEVICE__
return pci_read_config16(PCH_LPC_DEV, GPIO_BASE) & 0xfffc;
#else
return pci_read_config16(pcidev_on_root(0x1f, 0),