diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-05-06 23:17:39 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-16 17:12:43 +0000 |
| commit | 70c618547632924a4eae15023f14ab22469a26e0 (patch) | |
| tree | d0443440d8606b1690adda592814a83712c9ebb5 /src/southbridge/intel/lynxpoint/early_usb.c | |
| parent | 322b1c3d90200db2428554a9e1accfa07289930d (diff) | |
sb/intel/lynxpoint: Add native USB init
Implement native USB initialisation for Lynx Point. This is only needed
when MRC.bin is not used.
TO DO: Figure out how to deal with the FIXME's and TODO's lying around.
Change-Id: Ie0fbeeca7b1ca1557173772d733fd2fa27703373
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64179
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/early_usb.c')
| -rw-r--r-- | src/southbridge/intel/lynxpoint/early_usb.c | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/src/southbridge/intel/lynxpoint/early_usb.c b/src/southbridge/intel/lynxpoint/early_usb.c index a753681ce0..52e8ac17f8 100644 --- a/src/southbridge/intel/lynxpoint/early_usb.c +++ b/src/southbridge/intel/lynxpoint/early_usb.c @@ -4,17 +4,6 @@ #include <device/pci_def.h> #include "pch.h" -/* HCD_INDEX == 2 selects 0:1a.0 (PCH_EHCI2), any other index - * selects 0:1d.0 (PCH_EHCI1) for usbdebug use. - */ -#if CONFIG_USBDEBUG_HCD_INDEX != 2 -#define PCH_EHCI1_TEMP_BAR0 CONFIG_EHCI_BAR -#define PCH_EHCI2_TEMP_BAR0 (PCH_EHCI1_TEMP_BAR0 + 0x400) -#else -#define PCH_EHCI2_TEMP_BAR0 CONFIG_EHCI_BAR -#define PCH_EHCI1_TEMP_BAR0 (PCH_EHCI2_TEMP_BAR0 + 0x400) -#endif - /* * Setup USB controller MMIO BAR to prevent the * reference code from resetting the controller. |