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| author | Martin Roth <gaumless@gmail.com> | 2022-10-21 23:24:43 -0600 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-10-23 14:40:51 +0000 |
| commit | 94008a81e52cd717aea6291d7f52398285a27998 (patch) | |
| tree | 6030be30f3ea6d10bcf97881669051659ed95d95 /src/southbridge/intel/lynxpoint/chip.h | |
| parent | 1e336dd91e749a66efbb841be368c944dfd6a4f2 (diff) | |
soc/amd/mendocino: Add STB Spill-to-DRAM enum
This is the enum value to initialize the Smart Trace Buffer's
Spill-to-DRAM feature. More information on how this is used is
available in the STB Linux kernel driver.
Signed-off-by: Martin Roth <gaumless@gmail.com>
Change-Id: Iab2e5fb121902959ddd0e7c8cca930a327b69291
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68686
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/chip.h')
0 files changed, 0 insertions, 0 deletions