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authorMatt DeVillier <matt.devillier@gmail.com>2022-12-21 14:47:37 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-12-23 14:20:39 +0000
commit52c553e838efc01df2247e829c97f1239543f109 (patch)
treed5b7fd2b60aec92fe41aaba7ddc2af1e69cd691e /src/southbridge/intel/lynxpoint/Kconfig
parent42f704a9678b6aa978df3dd4148b69b3f4e7f3d6 (diff)
sb/intel/lynxpoint: Add Kconfig option to hide Intel ME
On lynxpoint devices, coreboot currently disables and hides the ME PCI interface by default, without any way to opt out of this behavior. Add a Kconfig option to allow for leaving the ME PCI interface enabled, but set the default to disabled as to leave the current behavior unchanged. Change-Id: I994cb5b05829eddad2e423a7440a9458f9952370 Signed-off-by: Matt DeVillier <matt.devillier@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/71195 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/Kconfig')
-rw-r--r--src/southbridge/intel/lynxpoint/Kconfig8
1 files changed, 8 insertions, 0 deletions
diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig
index ecfdea2aae..63058124a5 100644
--- a/src/southbridge/intel/lynxpoint/Kconfig
+++ b/src/southbridge/intel/lynxpoint/Kconfig
@@ -84,4 +84,12 @@ config SERIALIO_UART_CONSOLE
config CONSOLE_UART_BASE_ADDRESS
default 0xd6000000 if SERIALIO_UART_CONSOLE
+config DISABLE_ME_PCI
+ bool "Disable Intel ME PCI interface (MEI1)"
+ default y
+ help
+ Disable and hide the ME PCI interface during finalize stage of boot.
+ This will prevent the OS (and userspace apps) from interacting with
+ the ME via the PCI interface after boot.
+
endif