diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2022-02-14 12:55:31 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-02-15 23:39:12 +0000 |
| commit | d00cfcb0a1ec3669fdf3833cb3f2d11920bd622e (patch) | |
| tree | 813b9da2effb96132d349d9ab11e33c27b95be52 /src/southbridge/intel/ibexpeak/Makefile.inc | |
| parent | 34619178983c4af5a8d2f00c779f54e556e74b06 (diff) | |
nb/intel/ironlake/raminit_heci.c: Move to southbridge scope
HECI stuff is in the southbridge, so put the code in there. Rename the
file to match the name of the function it provides.
Change-Id: I71de1234547dbd46a9b4959c619d2ae194da620a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/61931
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/ibexpeak/Makefile.inc')
| -rw-r--r-- | src/southbridge/intel/ibexpeak/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc index c8c96a8dfa..b33252fea4 100644 --- a/src/southbridge/intel/ibexpeak/Makefile.inc +++ b/src/southbridge/intel/ibexpeak/Makefile.inc @@ -33,6 +33,7 @@ romstage-y += early_thermal.c romstage-y += ../bd82x6x/early_rcba.c romstage-y += early_cir.c romstage-y += early_usb.c +romstage-y += setup_heci_uma.c CPPFLAGS_common += -I$(src)/southbridge/intel/ibexpeak/include |