From d00cfcb0a1ec3669fdf3833cb3f2d11920bd622e Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Mon, 14 Feb 2022 12:55:31 +0100 Subject: nb/intel/ironlake/raminit_heci.c: Move to southbridge scope HECI stuff is in the southbridge, so put the code in there. Rename the file to match the name of the function it provides. Change-Id: I71de1234547dbd46a9b4959c619d2ae194da620a Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/61931 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/southbridge/intel/ibexpeak/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/southbridge/intel/ibexpeak/Makefile.inc') diff --git a/src/southbridge/intel/ibexpeak/Makefile.inc b/src/southbridge/intel/ibexpeak/Makefile.inc index c8c96a8dfa..b33252fea4 100644 --- a/src/southbridge/intel/ibexpeak/Makefile.inc +++ b/src/southbridge/intel/ibexpeak/Makefile.inc @@ -33,6 +33,7 @@ romstage-y += early_thermal.c romstage-y += ../bd82x6x/early_rcba.c romstage-y += early_cir.c romstage-y += early_usb.c +romstage-y += setup_heci_uma.c CPPFLAGS_common += -I$(src)/southbridge/intel/ibexpeak/include -- cgit v1.2.3