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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-26 22:46:43 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-26 22:46:43 +0000
commitb69cb5a31058c0295f2d810c852cc5b52d77225c (patch)
tree9f462e829279fbc1a892a70898ac2ee9da4c79e1 /src/southbridge/intel/i82870
parentb907d321a5d0957f5cbb03d8f9c8d0ff0c23523b (diff)
Convert some comments to proper Doxygen syntax.
Also, make them all fit in 80chars/column, fix some whitespace issues and also some typos I noticed. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5993 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82870')
-rw-r--r--src/southbridge/intel/i82870/p64h2_ioapic.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c
index 0f998dda9e..8af57beed7 100644
--- a/src/southbridge/intel/i82870/p64h2_ioapic.c
+++ b/src/southbridge/intel/i82870/p64h2_ioapic.c
@@ -18,15 +18,15 @@ static void p64h2_ioapic_enable(device_t dev)
pci_write_config16(dev, PCI_COMMAND, command);
}
-//----------------------------------------------------------------------------------
-// Function: p64h2_ioapic_init
-// Parameters: dev - PCI bus/device/function of P64H2 IOAPIC
-// NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0
-// Return Value: None
-// Description: Configure one of the IOAPICs in a P64H2.
-// Note that a PCI bus scan will detect both IOAPICs, so this function
-// will be called twice for each P64H2 in the system.
-//
+/**
+ * Configure one of the IOAPICs in a P64H2.
+ *
+ * Note that a PCI bus scan will detect both IOAPICs, so this function
+ * will be called twice for each P64H2 in the system.
+ *
+ * @param dev PCI bus/device/function of P64H2 IOAPIC.
+ * NOTE: There are two IOAPICs per P64H2, at D28:F0 and D30:F0.
+ */
static void p64h2_ioapic_init(device_t dev)
{
uint32_t memoryBase;