diff options
| author | Stefan Reinauer <stepan@coresystems.de> | 2010-04-27 06:56:47 +0000 |
|---|---|---|
| committer | Stefan Reinauer <stepan@openbios.org> | 2010-04-27 06:56:47 +0000 |
| commit | 14e22779625de673569c7b950ecc2753fb915b31 (patch) | |
| tree | 14a6ed759e116e9e6e9bbd7f499b74b96d6cc072 /src/southbridge/intel/i82870 | |
| parent | 0e1e8065e303030c39c3f2c27e5d32ee58a16c66 (diff) | |
Since some people disapprove of white space cleanups mixed in regular commits
while others dislike them being extra commits, let's clean them up once and
for all for the existing code. If it's ugly, let it only be ugly once :-)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82870')
| -rw-r--r-- | src/southbridge/intel/i82870/p64h2_ioapic.c | 10 | ||||
| -rw-r--r-- | src/southbridge/intel/i82870/p64h2_pcibridge.c | 4 |
2 files changed, 7 insertions, 7 deletions
diff --git a/src/southbridge/intel/i82870/p64h2_ioapic.c b/src/southbridge/intel/i82870/p64h2_ioapic.c index b2523ff436..0f998dda9e 100644 --- a/src/southbridge/intel/i82870/p64h2_ioapic.c +++ b/src/southbridge/intel/i82870/p64h2_ioapic.c @@ -39,9 +39,9 @@ static void p64h2_ioapic_init(device_t dev) num_p64h2_ioapics++; // A note on IOAPIC addresses: - // 0 and 1 are used for the local APICs of the dual virtual + // 0 and 1 are used for the local APICs of the dual virtual // (hyper-threaded) CPUs of physical CPU 0 (mainboard/Config.lb). - // 6 and 7 are used for the local APICs of the dual virtual + // 6 and 7 are used for the local APICs of the dual virtual // (hyper-threaded) CPUs of physical CPU 1 (mainboard/Config.lb). // 2 is used for the IOAPIC in the 82801 Southbridge (hard-coded in i82801xx_lpc.c) @@ -63,7 +63,7 @@ static void p64h2_ioapic_init(device_t dev) pWindowRegister = (volatile uint32_t*)(memoryBase + 0x10); printk(BIOS_DEBUG, "IOAPIC %d at %02x:%02x.%01x MBAR = %p DataAddr = %p\n", - apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), + apic_id, dev->bus->secondary, PCI_SLOT(dev->path.pci.devfn), PCI_FUNC(dev->path.pci.devfn), pIndexRegister, pWindowRegister); apic_id <<= 24; // Convert ID to bitmask @@ -72,13 +72,13 @@ static void p64h2_ioapic_init(device_t dev) *pWindowRegister = (*pWindowRegister & ~(0xF<<24)) | apic_id; // Set the ID if ((*pWindowRegister & (0xF<<24)) != apic_id) - die("p64h2_ioapic_init failed"); + die("p64h2_ioapic_init failed"); *pIndexRegister = 3; // Select Boot Configuration register *pWindowRegister |= 1; // Use Processor System Bus to deliver interrupts if (!(*pWindowRegister & 1)) - die("p64h2_ioapic_init failed"); + die("p64h2_ioapic_init failed"); } static struct device_operations ioapic_ops = { diff --git a/src/southbridge/intel/i82870/p64h2_pcibridge.c b/src/southbridge/intel/i82870/p64h2_pcibridge.c index a489fe53f9..89b86f5966 100644 --- a/src/southbridge/intel/i82870/p64h2_pcibridge.c +++ b/src/southbridge/intel/i82870/p64h2_pcibridge.c @@ -35,5 +35,5 @@ static const struct pci_driver pcix_driver __pci_driver = { .ops = &pcix_ops, .vendor = PCI_VENDOR_ID_INTEL, .device = PCI_DEVICE_ID_INTEL_82870_1F0, -}; - +}; + |