diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2024-02-06 16:55:29 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-02-23 15:13:37 +0000 |
| commit | 0d19289e840f9c711f50a74437d1b3856222db03 (patch) | |
| tree | ca4e8ce2d51dfa9d10deceb28393a28c061a0952 /src/southbridge/intel/i82870/ioapic.c | |
| parent | a138cfb422109018ba35c8f5d82621717eaf0611 (diff) | |
arch/x86/ioapic: use uintptr_t for IOAPIC base address
Use uintptr_t for the IOAPIC base parameter of the various IOAPIC-
related functions to avoid needing type casts in the callers. This also
allows dropping the VIO_APIC_VADDR define and consistently use the
IO_APIC_ADDR define instead.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I912943e923ff092708e90138caa5e1daf269a69f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80358
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/southbridge/intel/i82870/ioapic.c')
| -rw-r--r-- | src/southbridge/intel/i82870/ioapic.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82870/ioapic.c b/src/southbridge/intel/i82870/ioapic.c index f6a4ac0b3e..4a25f6b951 100644 --- a/src/southbridge/intel/i82870/ioapic.c +++ b/src/southbridge/intel/i82870/ioapic.c @@ -6,6 +6,7 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <assert.h> +#include <types.h> #include "82870.h" static void p64h2_ioapic_enable(struct device *dev) @@ -27,17 +28,17 @@ static void p64h2_ioapic_enable(struct device *dev) */ static void p64h2_ioapic_init(struct device *dev) { - uint32_t memoryBase; + uintptr_t memoryBase; // Read the MBAR address for setting up the IOAPIC in memory space // NOTE: this address was assigned during enumeration of the bus - memoryBase = pci_read_config32(dev, PCI_BASE_ADDRESS_0); + memoryBase = (uintptr_t)pci_read_config32(dev, PCI_BASE_ADDRESS_0); - register_new_ioapic((void *)memoryBase); + register_new_ioapic(memoryBase); // Use Processor System Bus to deliver interrupts - ioapic_set_boot_config((void *)memoryBase, true); + ioapic_set_boot_config(memoryBase, true); } static struct device_operations ioapic_ops = { |