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author | zhaojohn <john.zhao@intel.com> | 2017-08-21 21:50:10 -0400 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-08-23 15:53:10 +0000 |
commit | 53461ad1f89f31a091d6e055dedbb9c0b014ac86 (patch) | |
tree | 73e24f986d505ea4f012f1a7b5ff06c817c17813 /src/southbridge/intel/i82801jx/lpc.c | |
parent | 5bddcc48b82c1887c96077c85ba078cd427d1133 (diff) |
src/mainboard/intel/cannonlake: Add gpio support for cannonlake
Add gpio pins configuration for cannonlake rvp u/y boards.
Change-Id: Ia077a070979401fe7bd23bda110d2b66a038d9fc
Signed-off-by: john zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/21139
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82801jx/lpc.c')
0 files changed, 0 insertions, 0 deletions