diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-04-09 20:40:39 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-07-21 15:43:18 +0000 |
| commit | 7b9c139ac26eded525980e896b354c99c08cdca7 (patch) | |
| tree | a30eb4f79395626495a106b7ca1f138753c90636 /src/southbridge/intel/i82801jx/acpi/pci.asl | |
| parent | c3198543b690fbdeda0f1e1ffaf78048fe765ec0 (diff) | |
sb/intel/i82801jx: Copy i82801ix
Change-Id: I878960e7e0f992426382ca717b8b42787f01ebc6
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/19248
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801jx/acpi/pci.asl')
| -rw-r--r-- | src/southbridge/intel/i82801jx/acpi/pci.asl | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801jx/acpi/pci.asl b/src/southbridge/intel/i82801jx/acpi/pci.asl new file mode 100644 index 0000000000..f2988e1951 --- /dev/null +++ b/src/southbridge/intel/i82801jx/acpi/pci.asl @@ -0,0 +1,71 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +// Intel PCI to PCI bridge 0:1e.0 + +Device (PCIB) +{ + Name (_ADR, 0x001e0000) + + Device (SLT1) + { + Name (_ADR, 0x00000000) + Name (_PRW, Package(){ 11, 4 }) + } + + Device (SLT2) + { + Name (_ADR, 0x00010000) + Name (_PRW, Package(){ 11, 4 }) + } + + Device (SLT3) + { + Name (_ADR, 0x00020000) + Name (_PRW, Package(){ 11, 4 }) + } + + Device (SLT6) + { + Name (_ADR, 0x00050000) + Name (_PRW, Package(){ 11, 4 }) + } + + Device (LANC) + { + Name (_ADR, 0x00080000) + Name (_PRW, Package(){ 11, 3 }) + } + + Device (LANR) + { + Name (_ADR, 0x00000000) + Name (_PRW, Package(){ 11, 3 }) + } + + // TODO: How many slots, where? + + // PCI Interrupt Routing. + // If PICM is set, interrupts are routed over the i8259, otherwise + // over the IOAPIC. (Really? If they're above 15 they need to be routed + // fixed over the IOAPIC?) + + Method (_PRT) + { + #include "acpi/ich9_pci_irqs.asl" + } + +} |