diff options
| author | Martin Roth <martinroth@google.com> | 2017-12-06 00:00:13 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-12-09 02:51:38 +0000 |
| commit | a55b0e5f65621fc7b90b2b5b7638303be52f12db (patch) | |
| tree | 7d68cf491fa9390583fd86219c40c77cf79f4b57 /src/southbridge/intel/i82801ix/pcie.c | |
| parent | 7eda534ad58150f962b0503d5d98705c250030fe (diff) | |
mainboard/google/kahlee: Update GPIOs
- The touchscreen interrupt was moved from the GPIO 3, as originally
suggested to GPIO 11. This changes the gevent from 2 to 18.
- Add EMMC reset on GPIO 93.
- Add EMMC bridge PCIe reset on GPIO 40.
- Set device enables to high.
- Remove extra SCI comment from GPIO 130.
- Set individual device PCIe reset pins to high.
- Enable global PCIe reset on GPIO 26.
- Mark LPC_CLK1 as unused.
- Update net names based on latest schematics.
- Set Direction and level/edge correctly for SCIs/SMIs.
- Remove SCI for pen detect.
- Add comments.
BUG=b:70234300, b:69681660, b:69305596
TEST=build grunt
Change-Id: Ib591e4278ed23d0963ecb19ad9c326498b4c7796
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/22751
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/southbridge/intel/i82801ix/pcie.c')
0 files changed, 0 insertions, 0 deletions