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authorFelix Singer <felixsinger@posteo.net>2022-01-02 01:21:34 +0100
committerFelix Singer <felixsinger@posteo.net>2022-07-29 10:16:08 +0000
commit644e59b7ba83b655f320156bbb43341021e9cf6c (patch)
treee52abd6b148115cb8ff45193e16a85b42946e608 /src/southbridge/intel/i82801ix/acpi
parenta41716fadc60c6260cecd38ad9d187bc1a69da0b (diff)
sb/intel/i82801ix/acpi: Replace LEqual(a,b) with ASL 2.0 syntax
Replace `LEqual(a, b)` with `a == b`. Change-Id: Ifffd21a663739f72a5584e26b79b0627dd532d9e Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/60667 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix/acpi')
-rw-r--r--src/southbridge/intel/i82801ix/acpi/ich9.asl2
-rw-r--r--src/southbridge/intel/i82801ix/acpi/lpc.asl6
2 files changed, 4 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801ix/acpi/ich9.asl b/src/southbridge/intel/i82801ix/acpi/ich9.asl
index 1a07ec211c..5722b4c741 100644
--- a/src/southbridge/intel/i82801ix/acpi/ich9.asl
+++ b/src/southbridge/intel/i82801ix/acpi/ich9.asl
@@ -173,7 +173,7 @@ Scope(\)
Method (_OSC, 4)
{
/* Check for proper GUID */
- If (LEqual (Arg0, ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766")))
+ If (Arg0 == ToUUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))
{
/* Let OS control everything */
Return (Arg3)
diff --git a/src/southbridge/intel/i82801ix/acpi/lpc.asl b/src/southbridge/intel/i82801ix/acpi/lpc.asl
index 9227735446..d2e88902f9 100644
--- a/src/southbridge/intel/i82801ix/acpi/lpc.asl
+++ b/src/southbridge/intel/i82801ix/acpi/lpc.asl
@@ -74,15 +74,15 @@ Device (LPCB)
{
If (HPTE) {
CreateDWordField(BUF0, \_SB.PCI0.LPCB.HPET.FED0._BAS, HPT0)
- If (Lequal(HPAS, 1)) {
+ If (HPAS == 1) {
HPT0 = HPET_BASE_ADDRESS + 0x1000
}
- If (Lequal(HPAS, 2)) {
+ If (HPAS == 2) {
HPT0 = HPET_BASE_ADDRESS + 0x2000
}
- If (Lequal(HPAS, 3)) {
+ If (HPAS == 3) {
HPT0 = HPET_BASE_ADDRESS + 0x3000
}
}