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authorFelix Singer <felixsinger@posteo.net>2022-12-12 04:49:46 +0100
committerFelix Singer <felixsinger@posteo.net>2022-12-14 00:47:52 +0000
commit2f308d4957ab41070017094fc887c451b41e799a (patch)
treecdb6acff72f939fdfc999d957a249a0b4b63cfdd /src/southbridge/intel/i82801ix/acpi/usb.asl
parentb26e2558777f87ebb72501cc7c583f80e4111f8d (diff)
sb/intel/acpi: Replace Store(a,b) with ASL 2.0 syntax
Replace `Store (a, b)` with `b = a`. Change-Id: I94b2e6ecb90a2616e184ae9331c397c75089e373 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70636 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix/acpi/usb.asl')
-rw-r--r--src/southbridge/intel/i82801ix/acpi/usb.asl24
1 files changed, 12 insertions, 12 deletions
diff --git a/src/southbridge/intel/i82801ix/acpi/usb.asl b/src/southbridge/intel/i82801ix/acpi/usb.asl
index 55929afb1a..f55ed6695d 100644
--- a/src/southbridge/intel/i82801ix/acpi/usb.asl
+++ b/src/southbridge/intel/i82801ix/acpi/usb.asl
@@ -21,9 +21,9 @@ Device (USB1)
{
// USB Controller can wake OS from Sleep State
If (Arg0) {
- Store (3, U1WE)
+ U1WE = 3
} Else {
- Store (0, U1WE)
+ U1WE = 0
}
}
@@ -60,9 +60,9 @@ Device (USB2)
{
// USB Controller can wake OS from Sleep State
If (Arg0) {
- Store (3, U2WE)
+ U2WE = 3
} Else {
- Store (0, U2WE)
+ U2WE = 0
}
}
@@ -100,9 +100,9 @@ Device (USB3)
{
// USB Controller can wake OS from Sleep State
If (Arg0) {
- Store (3, U3WE)
+ U3WE = 3
} Else {
- Store (0, U3WE)
+ U3WE = 0
}
}
@@ -175,9 +175,9 @@ Device (USB4)
{
// USB Controller can wake OS from Sleep State
If (Arg0) {
- Store (3, U1WE)
+ U1WE = 3
} Else {
- Store (0, U1WE)
+ U1WE = 0
}
}
@@ -214,9 +214,9 @@ Device (USB5)
{
// USB Controller can wake OS from Sleep State
If (Arg0) {
- Store (3, U2WE)
+ U2WE = 3
} Else {
- Store (0, U2WE)
+ U2WE = 0
}
}
@@ -254,9 +254,9 @@ Device (USB6)
{
// USB Controller can wake OS from Sleep State
If (Arg0) {
- Store (3, U3WE)
+ U3WE = 3
} Else {
- Store (0, U3WE)
+ U3WE = 0
}
}