diff options
| author | Yen Lin <yelin@nvidia.com> | 2015-05-06 18:08:22 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-07-23 16:44:30 +0200 |
| commit | a501a8f27fb1f5c2ede77191831628d9857e5ef0 (patch) | |
| tree | 0cd50ee1697078e9660650f915fc22961050ff8e /src/southbridge/intel/i82801ix/acpi/smbus.asl | |
| parent | 21ee13c3ca5581c41a53a7e255709aa3c22b373a (diff) | |
t210: implement MBIST workaround
MBIST has left some registers in non-suggested states. This CL
restores CAR CE's, SLCG overrides & PLLD settings.
BUG=None
BRANCH=None
TEST=tested on Smaug, still boot to kernel
Change-Id: I1ddb19dd9fb6d8fb4d36e67eedeb847c6fd9f774
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 37a1c90c6deb351b2ae2caa03e5076553126744b
Original-Change-Id: I613b4ef622d64305d436cb8379a5170b0fe1c9af
Original-Signed-off-by: Yen Lin <yelin@nvidia.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/282417
Original-Reviewed-by: Tom Warren <twarren@nvidia.com>
Original-Reviewed-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: http://review.coreboot.org/11039
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801ix/acpi/smbus.asl')
0 files changed, 0 insertions, 0 deletions