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authorArthur Heymans <arthur@aheymans.xyz>2017-03-09 12:02:52 +0100
committerMartin Roth <martinroth@google.com>2017-03-22 17:55:53 +0100
commit3f111b0b11cf3d14b9aded601b6a1dd84f35a8dc (patch)
treea11b02549c808bd7a59ee762a73bd46561731ea3 /src/southbridge/intel/i82801gx/smbus.c
parent70a8e34853d4b01ab7a2089821c35715c59b4415 (diff)
southbridge/intel/i82801gx: Fix problems found by checkpatch.pl
Change-Id: Iddc67e7c126ce19429afc24b021e385353564cb8 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18705 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/southbridge/intel/i82801gx/smbus.c')
-rw-r--r--src/southbridge/intel/i82801gx/smbus.c19
1 files changed, 11 insertions, 8 deletions
diff --git a/src/southbridge/intel/i82801gx/smbus.c b/src/southbridge/intel/i82801gx/smbus.c
index e6aa01885a..d028f73367 100644
--- a/src/southbridge/intel/i82801gx/smbus.c
+++ b/src/southbridge/intel/i82801gx/smbus.c
@@ -38,7 +38,8 @@ static int lsmbus_read_byte(device_t dev, u8 address)
return do_smbus_read_byte(res->base, device, address);
}
-static int do_smbus_write_byte(unsigned smbus_base, unsigned device, unsigned address, unsigned data)
+static int do_smbus_write_byte(unsigned int smbus_base, unsigned int device,
+ unsigned int address, unsigned int data)
{
unsigned char global_status_register;
@@ -92,8 +93,8 @@ static int lsmbus_write_byte(device_t dev, u8 address, u8 data)
return do_smbus_write_byte(res->base, device, address, data);
}
-static int do_smbus_block_write(unsigned smbus_base, unsigned device,
- unsigned cmd, unsigned bytes, const u8 *buf)
+static int do_smbus_block_write(unsigned int smbus_base, unsigned int device,
+ unsigned int cmd, unsigned int bytes, const u8 *buf)
{
u8 status;
@@ -123,7 +124,8 @@ static int do_smbus_block_write(unsigned smbus_base, unsigned device,
outb((inb(smbus_base + SMBHSTCTL) | 0x40),
smbus_base + SMBHSTCTL);
- while (!(inb(smbus_base + SMBHSTSTAT) & 1));
+ while (!(inb(smbus_base + SMBHSTSTAT) & 1))
+ ;
/* Poll for transaction completion */
do {
status = inb(smbus_base + SMBHSTSTAT);
@@ -155,8 +157,8 @@ static int lsmbus_block_write(device_t dev, u8 cmd, u8 bytes, const u8 *buf)
return do_smbus_block_write(res->base, device, cmd, bytes, buf);
}
-static int do_smbus_block_read(unsigned smbus_base, unsigned device,
- unsigned cmd, unsigned bytes, u8 *buf)
+static int do_smbus_block_read(unsigned int smbus_base, unsigned int device,
+ unsigned int cmd, unsigned int bytes, u8 *buf)
{
u8 status;
int bytes_read = 0;
@@ -180,7 +182,8 @@ static int do_smbus_block_read(unsigned smbus_base, unsigned device,
outb((inb(smbus_base + SMBHSTCTL) | 0x40),
smbus_base + SMBHSTCTL);
- while (!(inb(smbus_base + SMBHSTSTAT) & 1));
+ while (!(inb(smbus_base + SMBHSTSTAT) & 1))
+ ;
/* Poll for transaction completion */
do {
status = inb(smbus_base + SMBHSTSTAT);
@@ -225,7 +228,7 @@ static struct smbus_bus_operations lops_smbus_bus = {
.block_write = lsmbus_block_write,
};
-static void smbus_set_subsystem(device_t dev, unsigned vendor, unsigned device)
+static void smbus_set_subsystem(device_t dev, unsigned int vendor, unsigned int device)
{
if (!vendor || !device) {
pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID,