diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-28 04:57:27 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-06-22 11:54:08 +0000 |
| commit | 8d9a6f16258ada4d4c995ad55f8230a99b4f7129 (patch) | |
| tree | 2eaa46b8b6fc5a93e823a081a688f17deaf50ed6 /src/southbridge/intel/i82801gx/pcie.c | |
| parent | 1a1b04ea51686226e9dddbd9dd74550b340578a1 (diff) | |
sb/intel/i82801gx: Constify struct southbridge_intel_i82801gx_config
Change-Id: Ia5af84782d41a007be04c3dccc291b788ddfddfd
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40773
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/pcie.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/pcie.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/i82801gx/pcie.c b/src/southbridge/intel/i82801gx/pcie.c index adf0e491b5..dcad32250d 100644 --- a/src/southbridge/intel/i82801gx/pcie.c +++ b/src/southbridge/intel/i82801gx/pcie.c @@ -166,7 +166,7 @@ static void root_port_commit_config(struct device *dev) int coalesce = 0; if (dev->chip_info != NULL) { - struct southbridge_intel_i82801gx_config *config = dev->chip_info; + const struct southbridge_intel_i82801gx_config *config = dev->chip_info; coalesce = config->pcie_port_coalesce; } |