diff options
| author | Elyes Haouas <ehaouas@noos.fr> | 2022-11-22 10:43:32 +0100 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2022-11-24 06:04:40 +0000 |
| commit | 9f0e21a4dae864809e9651403ab5bad48e784bee (patch) | |
| tree | 83de1263981849065f94147f3c96f65d276af3e1 /src/southbridge/intel/i82801gx/lpc.c | |
| parent | 0f633f7f7f1ff38f9f55d98fd0c5e5c26b2a2e07 (diff) | |
sb/intel/i82801gx: Use "sb/intel/common/tco.h" macros
Also, use {read,write}_pmbase16() in lpc.c file instead of inw/out.
Change-Id: Id281a3478051c4876ccbe26452d8744769c86654
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/69878
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/lpc.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/lpc.c | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index d8c977694c..37095e8478 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -20,6 +20,7 @@ #include <southbridge/intel/common/hpet.h> #include <southbridge/intel/common/pmbase.h> #include <southbridge/intel/common/spi.h> +#include <southbridge/intel/common/tco.h> #include "chip.h" #include "i82801gx.h" @@ -440,9 +441,9 @@ static void lpc_final(struct device *dev) pci_or_config16(dev, GEN_PMCON_1, 1 << 4); /* TCO_Lock */ - tco1_cnt = inw(DEFAULT_PMBASE + 0x60 + TCO1_CNT); + tco1_cnt = read_pmbase16(PMBASE_TCO_OFFSET + TCO1_CNT); tco1_cnt |= (1 << 12); /* TCO lock */ - outw(tco1_cnt, DEFAULT_PMBASE + 0x60 + TCO1_CNT); + write_pmbase16(PMBASE_TCO_OFFSET + TCO1_CNT, tco1_cnt); /* Indicate finalize step with post code */ post_code(POST_OS_BOOT); |