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authorStefan Reinauer <stepan@coresystems.de>2009-10-26 17:12:21 +0000
committerStefan Reinauer <stepan@openbios.org>2009-10-26 17:12:21 +0000
commitaca6ec66bf7048e77ec960bb751a04e6b0528c70 (patch)
treef8fbc185686787e9453f0e6f229d88f38561333d /src/southbridge/intel/i82801gx/i82801gx_sata.c
parent3b314023802c7429012e5f09652047e0b32fb97a (diff)
Kontron 986LCD-M update
- run ACPI code through preprocessor so we get the same values as the C code - fix PCIe x16 slot - fix ICH7 Azalia/HDA driver - SMI/GNVS update security fix (only allow struct pointer update once) - ACPI updates - IDE driver fixes - add cmos options for disabling onboard ethernet and controlling system fan Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801gx/i82801gx_sata.c')
-rw-r--r--src/southbridge/intel/i82801gx/i82801gx_sata.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801gx/i82801gx_sata.c b/src/southbridge/intel/i82801gx/i82801gx_sata.c
index ddfe08d25a..ec477e1696 100644
--- a/src/southbridge/intel/i82801gx/i82801gx_sata.c
+++ b/src/southbridge/intel/i82801gx/i82801gx_sata.c
@@ -68,7 +68,7 @@ static void sata_init(struct device *dev)
pci_write_config16(dev, IDE_SDMA_TIM, 0x0200);
/* Set IDE I/O Configuration */
- reg32 = SIG_MODE_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
+ reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
pci_write_config32(dev, IDE_CONFIG, reg32);
/* Combine IDE - SATA configuration */
@@ -100,7 +100,7 @@ static void sata_init(struct device *dev)
pci_write_config16(dev, IDE_SDMA_TIM, 0x0001);
/* Set IDE I/O Configuration */
- reg32 = SIG_MODE_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
+ reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
pci_write_config32(dev, IDE_CONFIG, reg32);
/* Set Sata Controller Mode. */
@@ -146,7 +146,7 @@ static void sata_init(struct device *dev)
pci_write_config16(dev, IDE_SDMA_TIM, 0x0201);
/* Set IDE I/O Configuration */
- reg32 = SIG_MODE_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
+ reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
pci_write_config32(dev, IDE_CONFIG, reg32);
/* Port 0 & 1 enable XXX */