diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2020-04-04 13:43:03 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-04-05 13:33:31 +0000 |
| commit | 92646ea3e3456a0a975775a1f5aa5dc011a9b1b6 (patch) | |
| tree | 41fa48a2be2c72cc862431933fab741bf4dc9474 /src/southbridge/intel/i82801gx/early_smbus.c | |
| parent | deeccbf4e96de1cd4ed136f865b96a90db374886 (diff) | |
sb/intel/i82801gx: Improve code formatting
This mainly updates the formatting for the new 96 characters text width.
Change-Id: Ia75c3ca7136b0291b3ae82e6a281cc76b75965ca
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40127
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801gx/early_smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82801gx/early_smbus.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82801gx/early_smbus.c b/src/southbridge/intel/i82801gx/early_smbus.c index ea639f9fc4..3a1369a34b 100644 --- a/src/southbridge/intel/i82801gx/early_smbus.c +++ b/src/southbridge/intel/i82801gx/early_smbus.c @@ -21,8 +21,7 @@ int smbus_enable_iobar(uintptr_t base) return -1; /* Set SMBus I/O base. */ - pci_write_config32(dev, SMB_BASE, - base | PCI_BASE_ADDRESS_SPACE_IO); + pci_write_config32(dev, SMB_BASE, base | PCI_BASE_ADDRESS_SPACE_IO); /* Set SMBus enable. */ pci_write_config8(dev, HOSTC, HST_EN); @@ -48,8 +47,7 @@ int smbus_block_read(unsigned int device, unsigned int cmd, u8 bytes, u8 *buf) return do_smbus_block_read(SMBUS_IO_BASE, device, cmd, bytes, buf); } -int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, - const u8 *buf) +int smbus_block_write(unsigned int device, unsigned int cmd, u8 bytes, const u8 *buf) { return do_smbus_block_write(SMBUS_IO_BASE, device, cmd, bytes, buf); } |