src/southbridge: Drop unneeded empty lines

Change-Id: I02aa1e2a9a9061b34b91f832d96123a8595d61b7
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44592
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Michael Niewöhner <foss@mniewoehner.de>

5 files changed, 0 insertions, 20 deletions

diff --git a/src/southbridge/intel/i82801dx/ac97.c b/src/southbridge/intel/i82801dx/ac97.c
index 7adfa9618d..d6a6bc9864 100644
--- a/src/southbridge/intel/i82801dx/ac97.c
+++ b/src/southbridge/intel/i82801dx/ac97.c
@@ -33,7 +33,6 @@
 #define MBAR		0x14
 #define   SEC_CODEC	0x40
 
-
 /* FIXME. This table is probably mainboard specific */
 static u16 ac97_function[16*2][4] = {
 	{ (1 << 5), (2 << 11), (1 << 10), (3 << 13) },
diff --git a/src/southbridge/intel/i82801dx/fadt.c b/src/southbridge/intel/i82801dx/fadt.c
index 9239383c03..84ea73ad9c 100644
--- a/src/southbridge/intel/i82801dx/fadt.c
+++ b/src/southbridge/intel/i82801dx/fadt.c
@@ -20,7 +20,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt)
 {
 	u16 pmbase = pci_read_config16(pcidev_on_root(0x1f, 0), 0x40) & 0xfffe;
 
-
 	fadt->sci_int = 0x9;
 
 	if (permanent_smi_handler()) {
diff --git a/src/southbridge/intel/i82801dx/i82801dx.h b/src/southbridge/intel/i82801dx/i82801dx.h
index d5790ae13b..9864720ad0 100644
--- a/src/southbridge/intel/i82801dx/i82801dx.h
+++ b/src/southbridge/intel/i82801dx/i82801dx.h
@@ -46,8 +46,6 @@ void aseg_smm_lock(void);
 /* IDE_TIM bits */
 #define IDE_DECODE_ENABLE	(1 << 15)
 
-
-
 #define PCI_DMA_CFG     0x90
 #define SERIRQ_CNTL     0x64
 #define GEN_CNTL        0xd0
@@ -93,7 +91,6 @@ void aseg_smm_lock(void);
 
 #define RTC_FAILED      (1 <<2)
 
-
 #define PM1_STS		0x00
 #define   WAK_STS	(1 << 15)
 #define   PCIEXPWAK_STS	(1 << 14)
diff --git a/src/southbridge/intel/i82801dx/smi.c b/src/southbridge/intel/i82801dx/smi.c
index 26bbbe143d..dd993cedb0 100644
--- a/src/southbridge/intel/i82801dx/smi.c
+++ b/src/southbridge/intel/i82801dx/smi.c
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-
 #include <device/device.h>
 #include <device/pci.h>
 #include <console/console.h>
@@ -13,7 +12,6 @@
 #include <string.h>
 #include "i82801dx.h"
 
-
 void northbridge_write_smram(u8 smram);
 
 /* For intel/e7505. */
@@ -98,7 +96,6 @@ static void dump_smi_status(u32 smi_sts)
 	printk(BIOS_DEBUG, "\n");
 }
 
-
 /**
  * @brief read and clear GPE0_STS
  * @return GPE0_STS register
@@ -138,7 +135,6 @@ static void dump_gpe0_status(u32 gpe0_sts)
 	printk(BIOS_DEBUG, "\n");
 }
 
-
 /**
  * @brief read and clear ALT_GP_SMI_STS
  * @return ALT_GP_SMI_STS register
@@ -164,8 +160,6 @@ static void dump_alt_gp_smi_status(u16 alt_gp_smi_sts)
 	printk(BIOS_DEBUG, "\n");
 }
 
-
-
 /**
  * @brief read and clear TCOx_STS
  * @return TCOx_STS registers
@@ -184,7 +178,6 @@ static u32 reset_tco_status(void)
 	return reg32;
 }
 
-
 static void dump_tco_status(u32 tco_sts)
 {
 	printk(BIOS_DEBUG, "TCO_STS: ");
@@ -204,8 +197,6 @@ static void dump_tco_status(u32 tco_sts)
 	printk(BIOS_DEBUG, "\n");
 }
 
-
-
 /**
  * @brief Set the EOS bit
  */
diff --git a/src/southbridge/intel/i82801dx/smihandler.c b/src/southbridge/intel/i82801dx/smihandler.c
index af56941407..19fe5bba2a 100644
--- a/src/southbridge/intel/i82801dx/smihandler.c
+++ b/src/southbridge/intel/i82801dx/smihandler.c
@@ -96,7 +96,6 @@ static void dump_smi_status(u32 smi_sts)
 	printk(BIOS_DEBUG, "\n");
 }
 
-
 /**
  * @brief read and clear GPE0_STS
  * @return GPE0_STS register
@@ -136,7 +135,6 @@ static void dump_gpe0_status(u32 gpe0_sts)
 	printk(BIOS_DEBUG, "\n");
 }
 
-
 /**
  * @brief read and clear TCOx_STS
  * @return TCOx_STS registers
@@ -155,7 +153,6 @@ static u32 reset_tco_status(void)
 	return reg32;
 }
 
-
 static void dump_tco_status(u32 tco_sts)
 {
 	printk(BIOS_DEBUG, "TCO_STS: ");
@@ -222,7 +219,6 @@ static void busmaster_disable_on_bus(int bus)
 	}
 }
 
-
 static void southbridge_smi_sleep(void)
 {
 	u8 reg8;
@@ -389,8 +385,6 @@ static void southbridge_smi_mc(void)
 	printk(BIOS_DEBUG, "Microcontroller SMI.\n");
 }
 
-
-
 static void southbridge_smi_tco(void)
 {
 	u32 tco_sts;