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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-06 10:44:49 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-13 08:38:13 +0000
commit0377a369b9c34dd9e5e1002845e99d29dea55ca3 (patch)
treed85345dc447b2db608039b0b3c39d3d1e7619ac6 /src/southbridge/intel/i82801dx
parent34856579f8e9349104cfdd0245a2b966bc59a7ea (diff)
aopen/dxplplusu: Switch to C_ENVIRONMENT_BOOTBLOCK
This board is the only user of these ancient chipsets, so we'll do all in one go. Also wipe out some extra headers. Change-Id: I22c172d577e6072562d8fcfa58145ec62473823e Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/30688 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/i82801dx')
-rw-r--r--src/southbridge/intel/i82801dx/Kconfig4
-rw-r--r--src/southbridge/intel/i82801dx/Makefile.inc2
-rw-r--r--src/southbridge/intel/i82801dx/bootblock.c3
3 files changed, 4 insertions, 5 deletions
diff --git a/src/southbridge/intel/i82801dx/Kconfig b/src/southbridge/intel/i82801dx/Kconfig
index 5670e162cf..12640b32a2 100644
--- a/src/southbridge/intel/i82801dx/Kconfig
+++ b/src/southbridge/intel/i82801dx/Kconfig
@@ -31,8 +31,4 @@ config EHCI_BAR
hex
default 0xfef00000
-config BOOTBLOCK_SOUTHBRIDGE_INIT
- string
- default "southbridge/intel/i82801dx/bootblock.c"
-
endif
diff --git a/src/southbridge/intel/i82801dx/Makefile.inc b/src/southbridge/intel/i82801dx/Makefile.inc
index 7d87995259..5ba21309d6 100644
--- a/src/southbridge/intel/i82801dx/Makefile.inc
+++ b/src/southbridge/intel/i82801dx/Makefile.inc
@@ -30,4 +30,6 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
romstage-y += early_smbus.c
+bootblock-y += bootblock.c
+
endif
diff --git a/src/southbridge/intel/i82801dx/bootblock.c b/src/southbridge/intel/i82801dx/bootblock.c
index 8ae419dd9b..a5e48e5ded 100644
--- a/src/southbridge/intel/i82801dx/bootblock.c
+++ b/src/southbridge/intel/i82801dx/bootblock.c
@@ -11,9 +11,10 @@
* GNU General Public License for more details.
*/
+#include <cpu/intel/car/bootblock.h>
#include <arch/io.h>
-static void bootblock_southbridge_init(void)
+void bootblock_early_southbridge_init(void)
{
/* Set FWH IDs for 2 MB flash part. */
if (CONFIG_ROM_SIZE == 0x200000)