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author | Angel Pons <th3fanbus@gmail.com> | 2020-07-12 21:27:46 +0200 |
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committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-20 13:17:28 +0000 |
commit | 4787f2953cf48eadb8da5b71e85407bbe5abd8b0 (patch) | |
tree | 9e53c87a1d4bcc29c8fec1fa1ccf3995f64545bd /src/southbridge/intel/i82801dx/fadt.c | |
parent | 192b57cc8bf6d8a04bf20fa0270af4acceba42e9 (diff) |
sb/intel/i82371eb: Drop unneeded PM2 settings from FADT
The PM2_CNT register block is not present on this southbridge, according
to comments on the code. As per the ACPI specification, version 6.3,
section 4.8.1.3 (PM2 Control Register):
This register block is optional, if not supported its block pointer and
length contain a value of zero.
Since the FADT struct defaults to zero in coreboot, we don't need to do
anything to indicate PM2_CNT is not supported. So, drop unneeded values.
Change-Id: Ib3ff0fd9e0725f61c38e60ba56b95e6e77b0b1ed
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43382
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/i82801dx/fadt.c')
0 files changed, 0 insertions, 0 deletions