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author | Duncan Laurie <dlaurie@chromium.org> | 2013-05-01 11:27:58 -0700 |
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committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-25 23:11:28 +0100 |
commit | 144f7b29ad995da897ec6c6ee4f87bed2ec7d28e (patch) | |
tree | f9502c18a9554f44c3a1f034da21e127c7c5d495 /src/southbridge/intel/i82801cx | |
parent | 764d009a615a3c1bdc42aef5506fc9b199bf5047 (diff) |
lynxpoint: Add missing ME MBP entries
There were two undefined MBP types that are now defined.
These include NFC status and some interesting timing data.
ME: Wake Event to ME Reset: 6 ms
ME: ME Reset to Platform Reset: 7 ms
ME: Platform Reset to CPU Reset: 51 ms
Change-Id: I67bf1f303f3c32497041e64c40eb9ccb6a63d88a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/49756
Reviewed-on: http://review.coreboot.org/4152
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801cx')
0 files changed, 0 insertions, 0 deletions