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authorUwe Hermann <uwe@hermann-uwe.de>2010-10-12 17:34:08 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-10-12 17:34:08 +0000
commit74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1 (patch)
tree9cbdbe86bd282da60bfcbef7108ca6790bcde94e /src/southbridge/intel/i82801cx
parent4ffde94c4ec51cdb24103ec13653e6f40513e1bb (diff)
We define IO_APIC_ADDR in <arch/ioapic.h>, let's use it.
As both ioapic.h and acpi.h define a macro named "NMI", rename one of them (NMI -> NMIType in acpi.h). Abuild-tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801cx')
-rw-r--r--src/southbridge/intel/i82801cx/i82801cx_lpc.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/southbridge/intel/i82801cx/i82801cx_lpc.c b/src/southbridge/intel/i82801cx/i82801cx_lpc.c
index 3720262f05..2f2c4600a2 100644
--- a/src/southbridge/intel/i82801cx/i82801cx_lpc.c
+++ b/src/southbridge/intel/i82801cx/i82801cx_lpc.c
@@ -11,6 +11,7 @@
#include <pc80/mc146818rtc.h>
#include <pc80/isa-dma.h>
#include <arch/io.h>
+#include <arch/ioapic.h>
#include "i82801cx.h"
#define NMI_OFF 0
@@ -26,8 +27,8 @@
static void i82801cx_enable_ioapic( struct device *dev)
{
uint32_t dword;
- volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000;
- volatile uint32_t* ioapic_data = (volatile uint32_t*)0xfec00010;
+ volatile uint32_t* ioapic_index = (volatile uint32_t*)IO_APIC_ADDR;
+ volatile uint32_t* ioapic_data = (volatile uint32_t*)(IO_APIC_ADDR + 0x10);
dword = pci_read_config32(dev, GEN_CNTL);
dword |= (3 << 7); /* enable ioapic & disable SMBus interrupts */
@@ -224,7 +225,7 @@ static void i82801cx_lpc_read_resources(device_t dev)
IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
res = new_resource(dev, 3); /* IOAPIC */
- res->base = 0xfec00000;
+ res->base = IO_APIC_ADDR;
res->size = 0x00001000;
res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
}