From 74d1a6e8a166cd477f667a6fcb1e96b8a0cbdac1 Mon Sep 17 00:00:00 2001 From: Uwe Hermann Date: Tue, 12 Oct 2010 17:34:08 +0000 Subject: We define IO_APIC_ADDR in , let's use it. As both ioapic.h and acpi.h define a macro named "NMI", rename one of them (NMI -> NMIType in acpi.h). Abuild-tested. Signed-off-by: Uwe Hermann Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5943 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/southbridge/intel/i82801cx/i82801cx_lpc.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'src/southbridge/intel/i82801cx') diff --git a/src/southbridge/intel/i82801cx/i82801cx_lpc.c b/src/southbridge/intel/i82801cx/i82801cx_lpc.c index 3720262f05..2f2c4600a2 100644 --- a/src/southbridge/intel/i82801cx/i82801cx_lpc.c +++ b/src/southbridge/intel/i82801cx/i82801cx_lpc.c @@ -11,6 +11,7 @@ #include #include #include +#include #include "i82801cx.h" #define NMI_OFF 0 @@ -26,8 +27,8 @@ static void i82801cx_enable_ioapic( struct device *dev) { uint32_t dword; - volatile uint32_t* ioapic_index = (volatile uint32_t*)0xfec00000; - volatile uint32_t* ioapic_data = (volatile uint32_t*)0xfec00010; + volatile uint32_t* ioapic_index = (volatile uint32_t*)IO_APIC_ADDR; + volatile uint32_t* ioapic_data = (volatile uint32_t*)(IO_APIC_ADDR + 0x10); dword = pci_read_config32(dev, GEN_CNTL); dword |= (3 << 7); /* enable ioapic & disable SMBus interrupts */ @@ -224,7 +225,7 @@ static void i82801cx_lpc_read_resources(device_t dev) IORESOURCE_ASSIGNED | IORESOURCE_FIXED; res = new_resource(dev, 3); /* IOAPIC */ - res->base = 0xfec00000; + res->base = IO_APIC_ADDR; res->size = 0x00001000; res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } -- cgit v1.2.3