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| author | Timothy Pearson <tpearson@raptorengineeringinc.com> | 2015-08-02 21:29:20 -0500 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2015-10-16 21:25:28 +0000 |
| commit | cbda504eecc03f63313f054b83fc6b3c6988a9db (patch) | |
| tree | ecf90e0bd4e5b9d38fc682ef677fc76ef6a18382 /src/southbridge/intel/i82801cx/pci.c | |
| parent | cfbcba5db87e9d461d9ba5c5d3fb6a7754c73694 (diff) | |
southbridge/amd/sr5650: Remove unnecessary register configuration
Do not hardcode the CPU downstream non-posted request limit; the
value of this register is CPU family specific and is set appropriately
in the corresponding CPU driver code.
Change-Id: I432b942f114243cba23c9a8d916cf6d07bc4740b
Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
Reviewed-on: http://review.coreboot.org/11935
Tested-by: build bot (Jenkins)
Reviewed-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'src/southbridge/intel/i82801cx/pci.c')
0 files changed, 0 insertions, 0 deletions