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| author | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-10-28 18:01:22 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2015-10-30 18:53:13 +0100 |
| commit | 3efcd2eeee8b3c68996cbe763685117eff483c08 (patch) | |
| tree | da42a57b6b7098b474361e8959e1da55e258f079 /src/southbridge/intel/i82801cx/pci.c | |
| parent | 31ff120a2c541aecfef318a19ad033c6b8f6fabd (diff) | |
Drop southbridge intel/i82801cx
All boards using this southbridge have been removed from
the tree already.
Change-Id: I08269931d845d1f57b34174238bcce245ad77894
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/12237
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/southbridge/intel/i82801cx/pci.c')
| -rw-r--r-- | src/southbridge/intel/i82801cx/pci.c | 29 |
1 files changed, 0 insertions, 29 deletions
diff --git a/src/southbridge/intel/i82801cx/pci.c b/src/southbridge/intel/i82801cx/pci.c deleted file mode 100644 index 1ebe8c7af9..0000000000 --- a/src/southbridge/intel/i82801cx/pci.c +++ /dev/null @@ -1,29 +0,0 @@ -#include <console/console.h> -#include <device/device.h> -#include <device/pci.h> -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include "i82801cx.h" - -static void pci_init(struct device *dev) -{ - // NOTE: the original (v1) 'CA code set these in the bridge register (0x3E-3F) - /* Enable pci error detecting */ - uint32_t dword = pci_read_config32(dev, PCI_COMMAND); - dword |= (PCI_COMMAND_SERR | PCI_COMMAND_PARITY); - pci_write_config32(dev, PCI_COMMAND, dword); -} - -static struct device_operations pci_ops = { - .read_resources = pci_bus_read_resources, - .set_resources = pci_dev_set_resources, - .enable_resources = pci_bus_enable_resources, - .init = pci_init, - .scan_bus = pci_scan_bridge, -}; - -static const struct pci_driver pci_driver __pci_driver = { - .ops = &pci_ops, - .vendor = PCI_VENDOR_ID_INTEL, - .device = PCI_DEVICE_ID_INTEL_82801CA_PCI, -}; |