diff options
| author | Steven J. Magnani <steve@digidescorp.com> | 2005-09-14 15:34:03 +0000 |
|---|---|---|
| committer | Steven J. Magnani <steve@digidescorp.com> | 2005-09-14 15:34:03 +0000 |
| commit | 706aed8eb9c1836d1b6c53b081f789a1d3afaa25 (patch) | |
| tree | 953355608f5491e7e046a30e0cba007e27522bf9 /src/southbridge/intel/i82801ca/i82801ca_reset.c | |
| parent | 09e4ef670245566f1ee50759976babac17aae55d (diff) | |
Initial revision.
Based on i82801er and LB v1 code.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82801ca/i82801ca_reset.c')
| -rw-r--r-- | src/southbridge/intel/i82801ca/i82801ca_reset.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/src/southbridge/intel/i82801ca/i82801ca_reset.c b/src/southbridge/intel/i82801ca/i82801ca_reset.c new file mode 100644 index 0000000000..93ef6d9f23 --- /dev/null +++ b/src/southbridge/intel/i82801ca/i82801ca_reset.c @@ -0,0 +1,8 @@ +#include <arch/io.h> + +void i82801ca_hard_reset(void) +{ + /* Try rebooting through port 0xcf9 */ + // Hard reset without power cycle + outb((0 <<3)|(1<<2)|(1<<1), 0xcf9); +} |