diff options
| author | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-19 21:12:05 +0000 |
|---|---|---|
| committer | Uwe Hermann <uwe@hermann-uwe.de> | 2010-09-19 21:12:05 +0000 |
| commit | 0865b4d9c06d584cfb43793f710d7dfa58e3275e (patch) | |
| tree | f00c68b85d4a9ba86f46affb7f817b4604808a29 /src/southbridge/intel/i82371eb/i82371eb_early_smbus.c | |
| parent | 78301d02b01d01302e6f9ce95db1e59c360a0ba9 (diff) | |
Make ASUS P3B-F RAM init actually work by enabling SPD access.
On this board all reads from SPD return 0xff by default, there's a custom
GPIO fiddling needed to enable access to the SPD SMBus offsets at
0x50-0x53. While coreboot actually sort of booted sometimes before r5193,
that was just sheer luck as the RAM init was hardcoded in certain ways.
Since the proper, more heavily SPD-based RAM init the brokenness of the
ASUS P3B-F RAM init was becoming visible.
This patch uses GPIOs to enable access to the SPD SMBus offsets,
and resets the GPIOs again after RAM init (this is needed to allow for
lm-sensors to work, for example).
Tested successfully on hardware.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb_early_smbus.c')
| -rw-r--r-- | src/southbridge/intel/i82371eb/i82371eb_early_smbus.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c index ada781ec26..76ae9f50b2 100644 --- a/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c +++ b/src/southbridge/intel/i82371eb/i82371eb_early_smbus.c @@ -33,14 +33,12 @@ static void enable_smbus(void) u8 reg8; u16 reg16; - /* Check for SMBus device PCI ID on the 82371AB/EB/MB. */ + /* Check for SMBus/PM device PCI ID on the 82371AB/EB/MB. */ dev = pci_locate_device(PCI_ID(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_SMB_ACPI), 0); if (dev == PCI_DEV_INVALID) - die("SMBus controller not found\n"); - - print_spew("SMBus controller enabled\n"); + die("SMBus/PM controller not found\n"); /* Set the SMBus I/O base. */ pci_write_config32(dev, SMBBA, SMBUS_IO_BASE | 1); |