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authorMarc Jones <marc.jones@amd.com>2007-06-02 23:55:17 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2007-06-02 23:55:17 +0000
commitf027280d39d58fa145a0c966ed6c3068de54cdbf (patch)
treeaeddd8e46b049278621b10d2c747d058854cb954 /src/southbridge/intel/i82371eb/i82371eb.h
parent22c6afcae4481a593d31334a31ecf412909fd921 (diff)
The UART disable code was causing a hang and was worked around with a
return that skipped the disable code. This patch removes the return and fixes the UART disable code. The problem was that the disable code was ORing bits into the Legacy_IO MSR causing issues with the LPC SIOs init code that would manifest as a hang because the IO would not be decoded correctly. ANDing to clear the bits fixes the issue. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2706 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/southbridge/intel/i82371eb/i82371eb.h')
0 files changed, 0 insertions, 0 deletions