diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2016-08-31 19:22:16 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-08-31 20:22:46 +0200 |
| commit | ba28e8d73b143def8dfe7c0dc7cfcbce83c601a1 (patch) | |
| tree | 9f7e4416b63e26ee3f4df6f9a61ab55f377bcb5f /src/southbridge/intel/i3100 | |
| parent | 2e4d80687dd79890c7c9edad8dbaf6e89edf2afc (diff) | |
src/southbridge: Code formating
Change-Id: Icfc35b73bacb60b1f21e71e70ad4418ec3e644f6
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/16291
Reviewed-by: Martin Roth <martinroth@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/southbridge/intel/i3100')
| -rw-r--r-- | src/southbridge/intel/i3100/early_smbus.c | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/i3100/lpc.c | 28 | ||||
| -rw-r--r-- | src/southbridge/intel/i3100/sata.c | 2 |
3 files changed, 16 insertions, 16 deletions
diff --git a/src/southbridge/intel/i3100/early_smbus.c b/src/southbridge/intel/i3100/early_smbus.c index 12a9202e03..2cb241a138 100644 --- a/src/southbridge/intel/i3100/early_smbus.c +++ b/src/southbridge/intel/i3100/early_smbus.c @@ -27,7 +27,7 @@ static void enable_smbus(void) pci_write_config8(dev, 0x40, 1); pci_write_config8(dev, 0x4, 1); /* SMBALERT_DIS */ - outb(4, SMBUS_IO_BASE + SMBSLVCMD); + outb(4, SMBUS_IO_BASE + SMBSLVCMD); /* Disable interrupt generation */ outb(0, SMBUS_IO_BASE + SMBHSTCTL); diff --git a/src/southbridge/intel/i3100/lpc.c b/src/southbridge/intel/i3100/lpc.c index 77853a8631..7b319cf97c 100644 --- a/src/southbridge/intel/i3100/lpc.c +++ b/src/southbridge/intel/i3100/lpc.c @@ -206,19 +206,19 @@ static void i3100_pirq_init(device_t dev) if (config->pirq_e_h) pci_write_config32(dev, 0x68, config->pirq_e_h); - for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { - u8 int_pin=0, int_line=0; + for (irq_dev = all_devices; irq_dev; irq_dev = irq_dev->next) { + u8 int_pin=0, int_line=0; - if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) - continue; + if (!irq_dev->enabled || irq_dev->path.type != DEVICE_PATH_PCI) + continue; - int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); - switch (int_pin) { - case 1: /* INTA# */ + int_pin = pci_read_config8(irq_dev, PCI_INTERRUPT_PIN); + switch (int_pin) { + case 1: /* INTA# */ int_line = config->pirq_a_d & 0xff; break; - case 2: /* INTB# */ + case 2: /* INTB# */ int_line = (config->pirq_a_d >> 8) & 0xff; break; @@ -226,17 +226,17 @@ static void i3100_pirq_init(device_t dev) int_line = (config->pirq_a_d >> 16) & 0xff; break; - case 4: /* INTD# */ + case 4: /* INTD# */ int_line = (config->pirq_a_d >> 24) & 0xff; break; - } + } - if (!int_line) - continue; + if (!int_line) + continue; printk(BIOS_DEBUG, "%s: irq pin %d, irq line %d\n", dev_path(irq_dev), int_pin, int_line); - pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); - } + pci_write_config8(irq_dev, PCI_INTERRUPT_LINE, int_line); + } } diff --git a/src/southbridge/intel/i3100/sata.c b/src/southbridge/intel/i3100/sata.c index f4dff8bb79..27bd2ce141 100644 --- a/src/southbridge/intel/i3100/sata.c +++ b/src/southbridge/intel/i3100/sata.c @@ -42,7 +42,7 @@ static void sata_init(struct device *dev) /* Enable SATA devices */ printk(BIOS_INFO, "SATA init (%s mode)\n", ahci ? "AHCI" : "Legacy"); - if(ahci) { + if (ahci) { /* AHCI mode */ pci_write_config8(dev, SATA_MAP, (1 << 6) | (0 << 0)); |