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authorAaron Durbin <adurbin@chromium.org>2016-11-18 08:10:35 -0600
committerAaron Durbin <adurbin@chromium.org>2016-11-19 16:55:52 +0100
commitbff8c5ec1977039b7edd1de02768c44a7055fce9 (patch)
treea6afdabba2b71a3c0f1ff6d96f437e044661804c /src/southbridge/intel/i3100/chip.h
parente39a8a9c092ed66686632d591ec84ed7a6165a50 (diff)
soc/intel/common/lpss_i2c: fix NULL dereference in error path
If the SoC clock speed is not supported there is supposed to be an error printed. However, the value printed was wrong which was dereferencing a NULL struct. Fix that. Change-Id: I5021ad8c1581d1935b39875ffa3aa00b594c537a Found-by: Coverity Scan #1365977 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/17468 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/southbridge/intel/i3100/chip.h')
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