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authorMartin Roth <gaumless@gmail.com>2014-05-21 14:20:38 -0600
committerMartin Roth <gaumless@gmail.com>2014-07-30 19:00:15 +0200
commit2963ae7fd49c7086ca9c4231f00a94e2f8a33080 (patch)
tree8836147464d4ce337ba360391a99d49da5c66b8c /src/southbridge/intel/fsp_rangeley/romstage.h
parent09670265b63184f92d78fc8fe5311f3662cc528a (diff)
northbridge/intel: Add fsp_rangeley northbridge support
This adds the northbridge initialization pieces for Intel's Atom C2000 processor (Formerly Rangeley). It is intended to be used with the Intel Atom C2000 FSP and does not contain all of the pieces that would otherwise be required for initialization. Not currently supported: S3 suspend/resume CAR memory Migration (No early cbmem console) SMM Change-Id: I7665212c892d9a08ecf35d7be70d0afe5fd2c77b Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: http://review.coreboot.org/6369 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/romstage.h')
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