diff options
| author | nicky sielicki <nlsielicki@wisc.edu> | 2015-04-09 20:21:56 -0500 |
|---|---|---|
| committer | Martin Roth <gaumless@gmail.com> | 2015-04-10 17:57:11 +0200 |
| commit | 1376b680c24025234e8bad0e7982dfca4dc1afec (patch) | |
| tree | e45460d167c7058b134a959c0133a4b6fcb002e6 /src/southbridge/intel/fsp_rangeley/gpio.c | |
| parent | 1483822ab8a1748b18b4a41e24db2381121c04ef (diff) | |
southbridge/intel/fsp_rangeley/ : Spellcheck + Formatting
Changes:
acpi.c - Capitalize an acronym.
early_spi.c - Spelling error.
gpio.c - Capitalization of acronym + sentences.
gpio.h - Capitalization of sentences.
lpc.c - Capitalization of sentences.
soc.c - Spelling error + capitalization of acronym.
I just wanted to go through the process of commiting something onto Gerrit.
Change-Id: Iad2ac5409f883c5b7cbc25e4e296f386ad7e13d0
Signed-off-by: nicky sielicki <nlsielicki@wisc.edu>
Reviewed-on: http://review.coreboot.org/9510
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <gaumless@gmail.com>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/gpio.c')
| -rw-r--r-- | src/southbridge/intel/fsp_rangeley/gpio.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/gpio.c b/src/southbridge/intel/fsp_rangeley/gpio.c index 6ea9c2e7e5..2b3ff9adfd 100644 --- a/src/southbridge/intel/fsp_rangeley/gpio.c +++ b/src/southbridge/intel/fsp_rangeley/gpio.c @@ -64,7 +64,7 @@ void setup_soc_gpios(const struct soc_gpio_map *gpio) if (gpio->sus.we) outl(*((u32*)gpio->sus.we), gpiobase + GPIO_SUS_WE); - /* GPIO PAD settings */ + /* GPIO PAD Settings */ /* CFIO Core Well Set 1 */ if ((gpio->core.cfio_init != NULL) || (gpio->core.cfio_entrynum != 0)) { write32(cfiobase + (0x0700 / sizeof(u32)), (u32)0x01001002); @@ -100,7 +100,7 @@ int get_gpio(int gpio_num) int bit; if (gpio_num > MAX_GPIO_NUMBER) - return 0; /* Ignore wrong gpio numbers. */ + return 0; /* Ignore wrong GPIO numbers. */ bit = gpio_num % 32; |