aboutsummaryrefslogtreecommitdiff
path: root/src/southbridge/intel/fsp_bd82x6x/acpi
diff options
context:
space:
mode:
authorVladimir Serbinenko <phcoder@gmail.com>2014-10-10 09:38:44 +0200
committerVladimir Serbinenko <phcoder@gmail.com>2014-10-18 22:05:00 +0200
commite7ff9d8839b0f7718f208f31bb7e7e504a97c657 (patch)
tree8302b8d030dd6483eb80aa1533c71111851be2b1 /src/southbridge/intel/fsp_bd82x6x/acpi
parente6e5b5ef556904ab5d03f7b6f750b4d25df961f4 (diff)
fsp_sandybridge: Move to per-device ACPI.
Just took combined sandybridge per-device ACPI patch and applied it on FSP flavour to avoid need of separate tests. Change-Id: I09838cc01ede504416078edcb1c267a11539e714 Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/7044 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x/acpi')
-rw-r--r--src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl
index 2fe092d952..be1eafb1c7 100644
--- a/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl
+++ b/src/southbridge/intel/fsp_bd82x6x/acpi/globalnvs.asl
@@ -31,8 +31,8 @@ Name(\DSEN, 1) // Display Output Switching Enable
* we have to fix it up in coreboot's ACPI creation phase.
*/
-
-OperationRegion (GNVS, SystemMemory, 0xC0DEBABE, 0xf00)
+External(NVSA)
+OperationRegion (GNVS, SystemMemory, NVSA, 0xf00)
Field (GNVS, ByteAcc, NoLock, Preserve)
{
/* Miscellaneous */