diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-09-25 12:21:07 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2017-12-10 14:50:08 +0000 |
| commit | bddef0dae73676c44364cd9d53813144ce42198a (patch) | |
| tree | 5f50270d1b42f2461eb323b1928a3b4f661bc5bd /src/southbridge/intel/fsp_bd82x6x/Kconfig | |
| parent | bf8db8d45b35181c84a163ab669f7a8d39ad5fec (diff) | |
sb/intel/common: Add SOUTHBRIDGE_INTEL_COMMON_SPI
This introduces a Kconfig option to include common Intel SPI code.
Change-Id: I970408e5656c0e8812b8609e2cc10d0bc8d8f6f2
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/21674
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/southbridge/intel/fsp_bd82x6x/Kconfig')
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/Kconfig | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig index 08400b354f..877a335545 100644 --- a/src/southbridge/intel/fsp_bd82x6x/Kconfig +++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig @@ -28,11 +28,11 @@ config SOUTH_BRIDGE_OPTIONS # dummy select USE_WATCHDOG_ON_BOOT select PCIEXP_ASPM select PCIEXP_COMMON_CLOCK - select SPI_FLASH select COMMON_FADT select HAVE_INTEL_FIRMWARE select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_SPI select HAVE_INTEL_CHIPSET_LOCKDOWN config EHCI_BAR |