diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-12-10 17:29:25 +0100 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-12-14 21:03:28 +0000 |
| commit | 5f7343273708490137163445c4a3ba38ed2b7b1e (patch) | |
| tree | 630859890822eae504a976c0f474be4f46a0de74 /src/southbridge/intel/common | |
| parent | 3ee6d7bf22d4618478ca78f38e2dc648e2f26db3 (diff) | |
sb/intel/common/smbus_ops.c: Clean up read resources
Using `pci_dev_read_resources` works just as well on bd82x6x (the
allocator does the same) and allows dropping the i82801gx check.
Change-Id: I1cb05131a82ebb7c45827eff8e09e445d9c695b3
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48538
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/common')
| -rw-r--r-- | src/southbridge/intel/common/smbus_ops.c | 9 |
1 files changed, 2 insertions, 7 deletions
diff --git a/src/southbridge/intel/common/smbus_ops.c b/src/southbridge/intel/common/smbus_ops.c index b0ecc1a59c..46fc58ab0a 100644 --- a/src/southbridge/intel/common/smbus_ops.c +++ b/src/southbridge/intel/common/smbus_ops.c @@ -67,17 +67,12 @@ struct smbus_bus_operations lops_smbus_bus = { void smbus_read_resources(struct device *dev) { + pci_dev_read_resources(dev); + struct resource *res = new_resource(dev, PCI_BASE_ADDRESS_4); res->base = CONFIG_FIXED_SMBUS_IO_BASE; res->size = 32; res->limit = res->base + res->size - 1; res->flags = IORESOURCE_IO | IORESOURCE_FIXED | IORESOURCE_RESERVE | IORESOURCE_STORED | IORESOURCE_ASSIGNED; - - /* The memory BAR does not exist for ICH7 and earlier */ - if (CONFIG(SOUTHBRIDGE_INTEL_I82801GX)) - return; - - /* Also add MMIO resource */ - res = pci_get_resource(dev, PCI_BASE_ADDRESS_0); } |