diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-10 17:03:32 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-26 10:53:16 +0000 |
| commit | e742b68f1ac9324ce1f700323f1226e86d068a8c (patch) | |
| tree | b7fc74a0d5a1d6b3ba0773b59839d2bc15fddcb0 /src/southbridge/intel/common/pmbase.c | |
| parent | ae1b2d49cf0ad09ff8f1e3904a9e7b23d6fb423b (diff) | |
arch/x86/ioapic: Promote ioapic_get_sci_pin()
Platform needs to implement this to provide information about SCI IRQ
pin and polarity, to be used for filling in ACPI FADT and MADT entries.
Change-Id: Icea7e9ca4abf3997c01617d2f78f25036d85a52f
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74337
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/southbridge/intel/common/pmbase.c')
| -rw-r--r-- | src/southbridge/intel/common/pmbase.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/src/southbridge/intel/common/pmbase.c b/src/southbridge/intel/common/pmbase.c index 2fddfc9f87..872d994210 100644 --- a/src/southbridge/intel/common/pmbase.c +++ b/src/southbridge/intel/common/pmbase.c @@ -2,6 +2,7 @@ #include <acpi/acpi.h> #include <arch/io.h> +#include <arch/ioapic.h> #include <assert.h> #include <bootmode.h> #include <device/pci_ops.h> @@ -92,3 +93,12 @@ int platform_is_resuming(void) return acpi_get_sleep_type() == ACPI_S3; } + +#define ACPI_SCI_IRQ 9 + +void ioapic_get_sci_pin(u8 *gsi, u8 *irq, u8 *flags) +{ + *gsi = ACPI_SCI_IRQ; + *irq = ACPI_SCI_IRQ; + *flags = MP_IRQ_TRIGGER_LEVEL | MP_IRQ_POLARITY_HIGH; +} |